/***************************************************************************
 *     Copyright (c) 1999-2014, Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 *
 * Module Description:
 *                     DO NOT EDIT THIS FILE DIRECTLY
 *
 * This module was generated magically with RDB from a source description
 * file. You must edit the source file for changes to be made to this file.
 *
 *
 * Date:           Generated on              Wed Sep  3 12:36:29 2014
 *                 Full Compile MD5 Checksum 1e5d73e2e037f01f6ffd5061d00a97a7
 *                   (minus title and desc)  
 *                 MD5 Checksum              c8f174845d8a27ef5365467f1c7a712b
 *
 * Compiled with:  RDB Utility               combo_header.pl
 *                 RDB Parser                3.0
 *                 unknown                   unknown
 *                 Perl Interpreter          5.008005
 *                 Operating System          linux
 *
 * Revision History:
 *
 * $brcm_Log: $
 *
 ***************************************************************************/

#ifndef BCHP_AON_CTRL_H__
#define BCHP_AON_CTRL_H__

/***************************************************************************
 *AON_CTRL - AON Control Registers
 ***************************************************************************/
#define BCHP_AON_CTRL_RESET_CTRL                 0x20410000 /* Reset Control register for AON */
#define BCHP_AON_CTRL_PM_CTRL                    0x20410004 /* Control register for Power Controller */
#define BCHP_AON_CTRL_PM_STATUS                  0x20410008 /* Status register for Power Controller */
#define BCHP_AON_CTRL_PM_IRQ_INPUT_STATUS        0x2041000c /* Power Management IRQ input status */
#define BCHP_AON_CTRL_PM_CPU_WAIT_COUNT          0x20410010 /* Power Management Wait counter in place of Wait for Host CPU IRQ */
#define BCHP_AON_CTRL_PM_CPU_GUARDBAND_TIMER     0x20410014 /* Power Good Guardband Timer for Host CPU */
#define BCHP_AON_CTRL_PM_S3_STANDBY_TIMER        0x20410018 /* Deep Standby or Battery Standby Assertion Timer */
#define BCHP_AON_CTRL_PM_S3_WAKEUP_TIMER         0x2041001c /* Deep Standby or Battery Standby Wakeup Timer */
#define BCHP_AON_CTRL_PM_FAST_PWRDN_PRECHARGE    0x20410020 /* Control register for Power Controller */
#define BCHP_AON_CTRL_PM_LED_CTRL                0x20410024 /* LED set control register */
#define BCHP_AON_CTRL_PM_LED_AUTO_ON_ENABLES     0x20410028 /* LED set control register */
#define BCHP_AON_CTRL_PM_CM_STATUS               0x2041002c /* CM Status register for Power Controller */
#define BCHP_AON_CTRL_HLCD_CTRL                  0x20410030 /* HW LED Clock Driver Control */
#define BCHP_AON_CTRL_SECOND_FRACTION_COUNTER    0x20410034 /* Second Fraction Counter Initial value */
#define BCHP_AON_CTRL_TIME_COUNTER               0x20410038 /* Hour/Minute Counter Initial value */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0           0x2041003c /* Digit Code for digit 0, 1, 2, 3 */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1           0x20410040 /* Digit Code for digit 4, 5, 6, 7 */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2           0x20410044 /* Digit Code for digit 8, 9 */
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET      0x20410048 /* Hour MSD/LSD and minute MSD/LSD address offset */
#define BCHP_AON_CTRL_LED_STATUS_CTRL            0x2041004c /* LED status control */
#define BCHP_AON_CTRL_GENERAL_CTRL_0             0x20410050 /* General control register 0 */
#define BCHP_AON_CTRL_GENERAL_STATUS_0           0x20410054 /* General status register 0 */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0     0x20410058 /* General control register without scan 0 */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS 0x2041005c /* Battery Mode Debug Status */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_FAILSAFE_TIMER 0x20410060 /* Battery Standby Mode Failsafe Timer */
#define BCHP_AON_CTRL_REBOOT_ON_POWERLOSS_TIMER  0x20410064 /* Reboot on AC Powerloss Timer */
#define BCHP_AON_CTRL_UNCLEARED_SCRATCH          0x20410068 /* Scratch register */
#define BCHP_AON_CTRL_RESET_HISTORY              0x2041006c /* Reset History Register For AON */
#define BCHP_AON_CTRL_NMI_CTRL                   0x20410070 /* Control register for NMI */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL           0x20410074 /* Ana xtal gisb control */
#define BCHP_AON_CTRL_SUB_TEST_MODE_CTRL         0x20410078 /* Test_mode control register */
#define BCHP_AON_CTRL_SUB_TEST_MODE              0x2041007c /* Register source for sub_test_mode */
#define BCHP_AON_CTRL_LATCHED_TEST_MODE          0x20410080 /* Final latched testmode value */
#define BCHP_AON_CTRL_LATCHED_SUB_TEST_MODE      0x20410084 /* Final latched sub-testmode value */
#define BCHP_AON_CTRL_PM_INITIATE                0x20410088 /* Power down initiate */
#define BCHP_AON_CTRL_HOST_MISC_CMDS             0x2041008c /* Power up restore */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL   0x20410090 /* Ana xtal external CML control */
#define BCHP_AON_CTRL_PM_DRAM_READY_STATUS_MASK  0x20410094 /* DRAM Ready status mask control */
#define BCHP_AON_CTRL_SPARE_CTRL_0               0x20410098 /* Spare control bits reserved for future use */

/***************************************************************************
 *RESET_CTRL - Reset Control register for AON
 ***************************************************************************/
/* AON_CTRL :: RESET_CTRL :: reserved0 [31:04] */
#define BCHP_AON_CTRL_RESET_CTRL_reserved0_MASK                    0xfffffff0
#define BCHP_AON_CTRL_RESET_CTRL_reserved0_SHIFT                   4

/* AON_CTRL :: RESET_CTRL :: front_panel_reset_enable_lock [03:03] */
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_enable_lock_MASK 0x00000008
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_enable_lock_SHIFT 3
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_enable_lock_DEFAULT 0x00000000

/* AON_CTRL :: RESET_CTRL :: front_panel_reset_enable [02:02] */
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_enable_MASK     0x00000004
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_enable_SHIFT    2
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_enable_DEFAULT  0x00000000

/* AON_CTRL :: RESET_CTRL :: front_panel_reset_polarity [01:01] */
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_polarity_MASK   0x00000002
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_polarity_SHIFT  1
#define BCHP_AON_CTRL_RESET_CTRL_front_panel_reset_polarity_DEFAULT 0x00000000

/* AON_CTRL :: RESET_CTRL :: clear_reset_history [00:00] */
#define BCHP_AON_CTRL_RESET_CTRL_clear_reset_history_MASK          0x00000001
#define BCHP_AON_CTRL_RESET_CTRL_clear_reset_history_SHIFT         0
#define BCHP_AON_CTRL_RESET_CTRL_clear_reset_history_DEFAULT       0x00000000

/***************************************************************************
 *PM_CTRL - Control register for Power Controller
 ***************************************************************************/
/* AON_CTRL :: PM_CTRL :: reserved0 [31:21] */
#define BCHP_AON_CTRL_PM_CTRL_reserved0_MASK                       0xffe00000
#define BCHP_AON_CTRL_PM_CTRL_reserved0_SHIFT                      21

/* AON_CTRL :: PM_CTRL :: pm_dphy_standby_clear [20:20] */
#define BCHP_AON_CTRL_PM_CTRL_pm_dphy_standby_clear_MASK           0x00100000
#define BCHP_AON_CTRL_PM_CTRL_pm_dphy_standby_clear_SHIFT          20
#define BCHP_AON_CTRL_PM_CTRL_pm_dphy_standby_clear_DEFAULT        0x00000000

/* AON_CTRL :: PM_CTRL :: pm_clear_battery_mode_debug_status [19:19] */
#define BCHP_AON_CTRL_PM_CTRL_pm_clear_battery_mode_debug_status_MASK 0x00080000
#define BCHP_AON_CTRL_PM_CTRL_pm_clear_battery_mode_debug_status_SHIFT 19

/* AON_CTRL :: PM_CTRL :: reboot_on_powerloss [18:18] */
#define BCHP_AON_CTRL_PM_CTRL_reboot_on_powerloss_MASK             0x00040000
#define BCHP_AON_CTRL_PM_CTRL_reboot_on_powerloss_SHIFT            18
#define BCHP_AON_CTRL_PM_CTRL_reboot_on_powerloss_DEFAULT          0x00000000

/* AON_CTRL :: PM_CTRL :: pm_battery_mode_failsafe_timer_start [17:17] */
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_mode_failsafe_timer_start_MASK 0x00020000
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_mode_failsafe_timer_start_SHIFT 17

/* AON_CTRL :: PM_CTRL :: pm_battery_mode_failsafe_timer_enable [16:16] */
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_mode_failsafe_timer_enable_MASK 0x00010000
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_mode_failsafe_timer_enable_SHIFT 16
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_mode_failsafe_timer_enable_DEFAULT 0x00000000

/* AON_CTRL :: PM_CTRL :: pm_allow_s2_to_battery_standby [15:15] */
#define BCHP_AON_CTRL_PM_CTRL_pm_allow_s2_to_battery_standby_MASK  0x00008000
#define BCHP_AON_CTRL_PM_CTRL_pm_allow_s2_to_battery_standby_SHIFT 15
#define BCHP_AON_CTRL_PM_CTRL_pm_allow_s2_to_battery_standby_DEFAULT 0x00000000

/* AON_CTRL :: PM_CTRL :: pm_allow_docsis_in_s2_standby [14:14] */
#define BCHP_AON_CTRL_PM_CTRL_pm_allow_docsis_in_s2_standby_MASK   0x00004000
#define BCHP_AON_CTRL_PM_CTRL_pm_allow_docsis_in_s2_standby_SHIFT  14
#define BCHP_AON_CTRL_PM_CTRL_pm_allow_docsis_in_s2_standby_DEFAULT 0x00000000

/* AON_CTRL :: PM_CTRL :: pm_set_force_battery_mode [13:13] */
#define BCHP_AON_CTRL_PM_CTRL_pm_set_force_battery_mode_MASK       0x00002000
#define BCHP_AON_CTRL_PM_CTRL_pm_set_force_battery_mode_SHIFT      13

/* AON_CTRL :: PM_CTRL :: pm_set_auto_battery_mode_rules [12:12] */
#define BCHP_AON_CTRL_PM_CTRL_pm_set_auto_battery_mode_rules_MASK  0x00001000
#define BCHP_AON_CTRL_PM_CTRL_pm_set_auto_battery_mode_rules_SHIFT 12

/* AON_CTRL :: PM_CTRL :: pm_wait_for_avs_ready [11:11] */
#define BCHP_AON_CTRL_PM_CTRL_pm_wait_for_avs_ready_MASK           0x00000800
#define BCHP_AON_CTRL_PM_CTRL_pm_wait_for_avs_ready_SHIFT          11
#define BCHP_AON_CTRL_PM_CTRL_pm_wait_for_avs_ready_DEFAULT        0x00000000

/* AON_CTRL :: PM_CTRL :: pm_wait_on_u2u_deregister [10:10] */
#define BCHP_AON_CTRL_PM_CTRL_pm_wait_on_u2u_deregister_MASK       0x00000400
#define BCHP_AON_CTRL_PM_CTRL_pm_wait_on_u2u_deregister_SHIFT      10
#define BCHP_AON_CTRL_PM_CTRL_pm_wait_on_u2u_deregister_DEFAULT    0x00000000

/* AON_CTRL :: PM_CTRL :: pm_battery_standby [09:09] */
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_standby_MASK              0x00000200
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_standby_SHIFT             9
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_standby_DEFAULT           0x00000000

/* AON_CTRL :: PM_CTRL :: pm_battery_stby_nmi_mask [08:08] */
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_stby_nmi_mask_MASK        0x00000100
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_stby_nmi_mask_SHIFT       8
#define BCHP_AON_CTRL_PM_CTRL_pm_battery_stby_nmi_mask_DEFAULT     0x00000001

/* AON_CTRL :: PM_CTRL :: min_s3_width_timer_bypass [07:07] */
#define BCHP_AON_CTRL_PM_CTRL_min_s3_width_timer_bypass_MASK       0x00000080
#define BCHP_AON_CTRL_PM_CTRL_min_s3_width_timer_bypass_SHIFT      7
#define BCHP_AON_CTRL_PM_CTRL_min_s3_width_timer_bypass_DEFAULT    0x00000000

/* AON_CTRL :: PM_CTRL :: pm_fast_power_down [06:06] */
#define BCHP_AON_CTRL_PM_CTRL_pm_fast_power_down_MASK              0x00000040
#define BCHP_AON_CTRL_PM_CTRL_pm_fast_power_down_SHIFT             6
#define BCHP_AON_CTRL_PM_CTRL_pm_fast_power_down_DEFAULT           0x00000000

/* AON_CTRL :: PM_CTRL :: pm_warm_boot [05:05] */
#define BCHP_AON_CTRL_PM_CTRL_pm_warm_boot_MASK                    0x00000020
#define BCHP_AON_CTRL_PM_CTRL_pm_warm_boot_SHIFT                   5
#define BCHP_AON_CTRL_PM_CTRL_pm_warm_boot_DEFAULT                 0x00000000

/* AON_CTRL :: PM_CTRL :: pm_deep_standby [04:04] */
#define BCHP_AON_CTRL_PM_CTRL_pm_deep_standby_MASK                 0x00000010
#define BCHP_AON_CTRL_PM_CTRL_pm_deep_standby_SHIFT                4
#define BCHP_AON_CTRL_PM_CTRL_pm_deep_standby_DEFAULT              0x00000000

/* AON_CTRL :: PM_CTRL :: pm_enable_cpu_pwrdn [03:03] */
#define BCHP_AON_CTRL_PM_CTRL_pm_enable_cpu_pwrdn_MASK             0x00000008
#define BCHP_AON_CTRL_PM_CTRL_pm_enable_cpu_pwrdn_SHIFT            3
#define BCHP_AON_CTRL_PM_CTRL_pm_enable_cpu_pwrdn_DEFAULT          0x00000000

/* AON_CTRL :: PM_CTRL :: pm_use_cpu_ready_ctrl [02:02] */
#define BCHP_AON_CTRL_PM_CTRL_pm_use_cpu_ready_ctrl_MASK           0x00000004
#define BCHP_AON_CTRL_PM_CTRL_pm_use_cpu_ready_ctrl_SHIFT          2
#define BCHP_AON_CTRL_PM_CTRL_pm_use_cpu_ready_ctrl_DEFAULT        0x00000000

/* AON_CTRL :: PM_CTRL :: pm_enable_pll_pwrdn [01:01] */
#define BCHP_AON_CTRL_PM_CTRL_pm_enable_pll_pwrdn_MASK             0x00000002
#define BCHP_AON_CTRL_PM_CTRL_pm_enable_pll_pwrdn_SHIFT            1
#define BCHP_AON_CTRL_PM_CTRL_pm_enable_pll_pwrdn_DEFAULT          0x00000000

/* AON_CTRL :: PM_CTRL :: pm_start_pwrdn [00:00] */
#define BCHP_AON_CTRL_PM_CTRL_pm_start_pwrdn_MASK                  0x00000001
#define BCHP_AON_CTRL_PM_CTRL_pm_start_pwrdn_SHIFT                 0

/***************************************************************************
 *PM_STATUS - Status register for Power Controller
 ***************************************************************************/
/* AON_CTRL :: PM_STATUS :: pm_wait_count_upper_bits [31:28] */
#define BCHP_AON_CTRL_PM_STATUS_pm_wait_count_upper_bits_MASK      0xf0000000
#define BCHP_AON_CTRL_PM_STATUS_pm_wait_count_upper_bits_SHIFT     28

/* AON_CTRL :: PM_STATUS :: pm_wait_counter_active [27:27] */
#define BCHP_AON_CTRL_PM_STATUS_pm_wait_counter_active_MASK        0x08000000
#define BCHP_AON_CTRL_PM_STATUS_pm_wait_counter_active_SHIFT       27

/* AON_CTRL :: PM_STATUS :: pm_power_down_cpu [26:26] */
#define BCHP_AON_CTRL_PM_STATUS_pm_power_down_cpu_MASK             0x04000000
#define BCHP_AON_CTRL_PM_STATUS_pm_power_down_cpu_SHIFT            26

/* AON_CTRL :: PM_STATUS :: pm_cpu_reset_b [25:25] */
#define BCHP_AON_CTRL_PM_STATUS_pm_cpu_reset_b_MASK                0x02000000
#define BCHP_AON_CTRL_PM_STATUS_pm_cpu_reset_b_SHIFT               25

/* AON_CTRL :: PM_STATUS :: pm_s3_wakeup_reset_ [24:24] */
#define BCHP_AON_CTRL_PM_STATUS_pm_s3_wakeup_reset__MASK           0x01000000
#define BCHP_AON_CTRL_PM_STATUS_pm_s3_wakeup_reset__SHIFT          24

/* AON_CTRL :: PM_STATUS :: pm_boundary_scan_request [23:23] */
#define BCHP_AON_CTRL_PM_STATUS_pm_boundary_scan_request_MASK      0x00800000
#define BCHP_AON_CTRL_PM_STATUS_pm_boundary_scan_request_SHIFT     23

/* AON_CTRL :: PM_STATUS :: pm_fast_pd_precharge_valid [22:22] */
#define BCHP_AON_CTRL_PM_STATUS_pm_fast_pd_precharge_valid_MASK    0x00400000
#define BCHP_AON_CTRL_PM_STATUS_pm_fast_pd_precharge_valid_SHIFT   22

/* AON_CTRL :: PM_STATUS :: pm_led_out [21:21] */
#define BCHP_AON_CTRL_PM_STATUS_pm_led_out_MASK                    0x00200000
#define BCHP_AON_CTRL_PM_STATUS_pm_led_out_SHIFT                   21

/* AON_CTRL :: PM_STATUS :: pm_standby_b [20:20] */
#define BCHP_AON_CTRL_PM_STATUS_pm_standby_b_MASK                  0x00100000
#define BCHP_AON_CTRL_PM_STATUS_pm_standby_b_SHIFT                 20

/* AON_CTRL :: PM_STATUS :: pm_ignore_inputs_ng [19:19] */
#define BCHP_AON_CTRL_PM_STATUS_pm_ignore_inputs_ng_MASK           0x00080000
#define BCHP_AON_CTRL_PM_STATUS_pm_ignore_inputs_ng_SHIFT          19

/* AON_CTRL :: PM_STATUS :: pm_ignore_inputs [18:18] */
#define BCHP_AON_CTRL_PM_STATUS_pm_ignore_inputs_MASK              0x00040000
#define BCHP_AON_CTRL_PM_STATUS_pm_ignore_inputs_SHIFT             18

/* AON_CTRL :: PM_STATUS :: pm_s2_standby [17:17] */
#define BCHP_AON_CTRL_PM_STATUS_pm_s2_standby_MASK                 0x00020000
#define BCHP_AON_CTRL_PM_STATUS_pm_s2_standby_SHIFT                17

/* AON_CTRL :: PM_STATUS :: pm_pwrdn_pll_req [16:16] */
#define BCHP_AON_CTRL_PM_STATUS_pm_pwrdn_pll_req_MASK              0x00010000
#define BCHP_AON_CTRL_PM_STATUS_pm_pwrdn_pll_req_SHIFT             16

/* AON_CTRL :: PM_STATUS :: pm_dis_xtal_clocks [15:15] */
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_xtal_clocks_MASK            0x00008000
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_xtal_clocks_SHIFT           15

/* AON_CTRL :: PM_STATUS :: pm_dis_all_clocks [14:14] */
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_all_clocks_MASK             0x00004000
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_all_clocks_SHIFT            14

/* AON_CTRL :: PM_STATUS :: pm_dphy_standby [13:13] */
#define BCHP_AON_CTRL_PM_STATUS_pm_dphy_standby_MASK               0x00002000
#define BCHP_AON_CTRL_PM_STATUS_pm_dphy_standby_SHIFT              13

/* AON_CTRL :: PM_STATUS :: pm_dis_cpu_clock [12:12] */
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_cpu_clock_MASK              0x00001000
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_cpu_clock_SHIFT             12

/* AON_CTRL :: PM_STATUS :: pm_dis_avd_rptd_clock [11:11] */
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_avd_rptd_clock_MASK         0x00000800
#define BCHP_AON_CTRL_PM_STATUS_pm_dis_avd_rptd_clock_SHIFT        11

/* AON_CTRL :: PM_STATUS :: pm_power_ctrl_disable [10:10] */
#define BCHP_AON_CTRL_PM_STATUS_pm_power_ctrl_disable_MASK         0x00000400
#define BCHP_AON_CTRL_PM_STATUS_pm_power_ctrl_disable_SHIFT        10

/* AON_CTRL :: PM_STATUS :: pm_pll_lock [09:09] */
#define BCHP_AON_CTRL_PM_STATUS_pm_pll_lock_MASK                   0x00000200
#define BCHP_AON_CTRL_PM_STATUS_pm_pll_lock_SHIFT                  9

/* AON_CTRL :: PM_STATUS :: pm_dram_ready_for_pwrdn [08:08] */
#define BCHP_AON_CTRL_PM_STATUS_pm_dram_ready_for_pwrdn_MASK       0x00000100
#define BCHP_AON_CTRL_PM_STATUS_pm_dram_ready_for_pwrdn_SHIFT      8

/* AON_CTRL :: PM_STATUS :: pm_bsp_ready_for_pwrdn [07:07] */
#define BCHP_AON_CTRL_PM_STATUS_pm_bsp_ready_for_pwrdn_MASK        0x00000080
#define BCHP_AON_CTRL_PM_STATUS_pm_bsp_ready_for_pwrdn_SHIFT       7

/* AON_CTRL :: PM_STATUS :: pm_cpu_ready_for_pwrdn [06:06] */
#define BCHP_AON_CTRL_PM_STATUS_pm_cpu_ready_for_pwrdn_MASK        0x00000040
#define BCHP_AON_CTRL_PM_STATUS_pm_cpu_ready_for_pwrdn_SHIFT       6

/* AON_CTRL :: PM_STATUS :: pm_sec_avd_rptd_clk_disable [05:05] */
#define BCHP_AON_CTRL_PM_STATUS_pm_sec_avd_rptd_clk_disable_MASK   0x00000020
#define BCHP_AON_CTRL_PM_STATUS_pm_sec_avd_rptd_clk_disable_SHIFT  5

/* AON_CTRL :: PM_STATUS :: pm_state [04:00] */
#define BCHP_AON_CTRL_PM_STATUS_pm_state_MASK                      0x0000001f
#define BCHP_AON_CTRL_PM_STATUS_pm_state_SHIFT                     0
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_ACTIVE                 0
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_PWRDN_RDY              1
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DISABLE_AVD_RPTD       2
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DISABLE_CPU            3
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_TRANSITION_TO_STANDBY  4
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_STANDBY                5
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_STANDBY_WITH_PLLS_ON   6
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_HOLD_CPU_POWERED_DOWN  7
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_POWER_UP_CPU           8
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_TRANSITION_TO_ACTIVE   9
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_FAST_PWRDN             10
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY_ENTRY_S1  11
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY_COLD_ENTRY_S2 12
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY_WARM_ENTRY_S2 13
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY_ENTRY_S3  14
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY           15
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY_EXIT_S1   16
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_DEEP_STANDBY_EXIT_S2   17
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY_ENTRY_S1 18
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY_COLD_ENTRY_S2 19
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY_WARM_ENTRY_S2 20
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY_ENTRY_S3 21
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY        22
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY_EXIT_S1 23
#define BCHP_AON_CTRL_PM_STATUS_pm_state_PM_BATTERY_STANDBY_EXIT_S2 24

/***************************************************************************
 *PM_IRQ_INPUT_STATUS - Power Management IRQ input status
 ***************************************************************************/
/* AON_CTRL :: PM_IRQ_INPUT_STATUS :: pm_irq_input_status [31:00] */
#define BCHP_AON_CTRL_PM_IRQ_INPUT_STATUS_pm_irq_input_status_MASK 0xffffffff
#define BCHP_AON_CTRL_PM_IRQ_INPUT_STATUS_pm_irq_input_status_SHIFT 0

/***************************************************************************
 *PM_CPU_WAIT_COUNT - Power Management Wait counter in place of Wait for Host CPU IRQ
 ***************************************************************************/
/* AON_CTRL :: PM_CPU_WAIT_COUNT :: reserved0 [31:16] */
#define BCHP_AON_CTRL_PM_CPU_WAIT_COUNT_reserved0_MASK             0xffff0000
#define BCHP_AON_CTRL_PM_CPU_WAIT_COUNT_reserved0_SHIFT            16

/* AON_CTRL :: PM_CPU_WAIT_COUNT :: counter_start_value [15:00] */
#define BCHP_AON_CTRL_PM_CPU_WAIT_COUNT_counter_start_value_MASK   0x0000ffff
#define BCHP_AON_CTRL_PM_CPU_WAIT_COUNT_counter_start_value_SHIFT  0
#define BCHP_AON_CTRL_PM_CPU_WAIT_COUNT_counter_start_value_DEFAULT 0x00000010

/***************************************************************************
 *PM_CPU_GUARDBAND_TIMER - Power Good Guardband Timer for Host CPU
 ***************************************************************************/
/* AON_CTRL :: PM_CPU_GUARDBAND_TIMER :: reserved0 [31:10] */
#define BCHP_AON_CTRL_PM_CPU_GUARDBAND_TIMER_reserved0_MASK        0xfffffc00
#define BCHP_AON_CTRL_PM_CPU_GUARDBAND_TIMER_reserved0_SHIFT       10

/* AON_CTRL :: PM_CPU_GUARDBAND_TIMER :: counter_start_value [09:00] */
#define BCHP_AON_CTRL_PM_CPU_GUARDBAND_TIMER_counter_start_value_MASK 0x000003ff
#define BCHP_AON_CTRL_PM_CPU_GUARDBAND_TIMER_counter_start_value_SHIFT 0
#define BCHP_AON_CTRL_PM_CPU_GUARDBAND_TIMER_counter_start_value_DEFAULT 0x0000007f

/***************************************************************************
 *PM_S3_STANDBY_TIMER - Deep Standby or Battery Standby Assertion Timer
 ***************************************************************************/
/* AON_CTRL :: PM_S3_STANDBY_TIMER :: reserved0 [31:27] */
#define BCHP_AON_CTRL_PM_S3_STANDBY_TIMER_reserved0_MASK           0xf8000000
#define BCHP_AON_CTRL_PM_S3_STANDBY_TIMER_reserved0_SHIFT          27

/* AON_CTRL :: PM_S3_STANDBY_TIMER :: counter_start_value [26:00] */
#define BCHP_AON_CTRL_PM_S3_STANDBY_TIMER_counter_start_value_MASK 0x07ffffff
#define BCHP_AON_CTRL_PM_S3_STANDBY_TIMER_counter_start_value_SHIFT 0
#define BCHP_AON_CTRL_PM_S3_STANDBY_TIMER_counter_start_value_DEFAULT 0x002932e0

/***************************************************************************
 *PM_S3_WAKEUP_TIMER - Deep Standby or Battery Standby Wakeup Timer
 ***************************************************************************/
/* AON_CTRL :: PM_S3_WAKEUP_TIMER :: reserved0 [31:27] */
#define BCHP_AON_CTRL_PM_S3_WAKEUP_TIMER_reserved0_MASK            0xf8000000
#define BCHP_AON_CTRL_PM_S3_WAKEUP_TIMER_reserved0_SHIFT           27

/* AON_CTRL :: PM_S3_WAKEUP_TIMER :: counter_start_value [26:00] */
#define BCHP_AON_CTRL_PM_S3_WAKEUP_TIMER_counter_start_value_MASK  0x07ffffff
#define BCHP_AON_CTRL_PM_S3_WAKEUP_TIMER_counter_start_value_SHIFT 0
#define BCHP_AON_CTRL_PM_S3_WAKEUP_TIMER_counter_start_value_DEFAULT 0x00107ac0

/***************************************************************************
 *PM_FAST_PWRDN_PRECHARGE - Control register for Power Controller
 ***************************************************************************/
/* AON_CTRL :: PM_FAST_PWRDN_PRECHARGE :: reserved0 [31:24] */
#define BCHP_AON_CTRL_PM_FAST_PWRDN_PRECHARGE_reserved0_MASK       0xff000000
#define BCHP_AON_CTRL_PM_FAST_PWRDN_PRECHARGE_reserved0_SHIFT      24

/* AON_CTRL :: PM_FAST_PWRDN_PRECHARGE :: pm_fast_power_down_precharge [23:00] */
#define BCHP_AON_CTRL_PM_FAST_PWRDN_PRECHARGE_pm_fast_power_down_precharge_MASK 0x00ffffff
#define BCHP_AON_CTRL_PM_FAST_PWRDN_PRECHARGE_pm_fast_power_down_precharge_SHIFT 0
#define BCHP_AON_CTRL_PM_FAST_PWRDN_PRECHARGE_pm_fast_power_down_precharge_DEFAULT 0x00000000

/***************************************************************************
 *PM_LED_CTRL - LED set control register
 ***************************************************************************/
/* AON_CTRL :: PM_LED_CTRL :: reserved0 [31:03] */
#define BCHP_AON_CTRL_PM_LED_CTRL_reserved0_MASK                   0xfffffff8
#define BCHP_AON_CTRL_PM_LED_CTRL_reserved0_SHIFT                  3

/* AON_CTRL :: PM_LED_CTRL :: led_status [02:02] */
#define BCHP_AON_CTRL_PM_LED_CTRL_led_status_MASK                  0x00000004
#define BCHP_AON_CTRL_PM_LED_CTRL_led_status_SHIFT                 2

/* AON_CTRL :: PM_LED_CTRL :: led_turn_on [01:01] */
#define BCHP_AON_CTRL_PM_LED_CTRL_led_turn_on_MASK                 0x00000002
#define BCHP_AON_CTRL_PM_LED_CTRL_led_turn_on_SHIFT                1

/* AON_CTRL :: PM_LED_CTRL :: led_turn_off [00:00] */
#define BCHP_AON_CTRL_PM_LED_CTRL_led_turn_off_MASK                0x00000001
#define BCHP_AON_CTRL_PM_LED_CTRL_led_turn_off_SHIFT               0

/***************************************************************************
 *PM_LED_AUTO_ON_ENABLES - LED set control register
 ***************************************************************************/
/* AON_CTRL :: PM_LED_AUTO_ON_ENABLES :: led_status [31:00] */
#define BCHP_AON_CTRL_PM_LED_AUTO_ON_ENABLES_led_status_MASK       0xffffffff
#define BCHP_AON_CTRL_PM_LED_AUTO_ON_ENABLES_led_status_SHIFT      0
#define BCHP_AON_CTRL_PM_LED_AUTO_ON_ENABLES_led_status_DEFAULT    0x00000000

/***************************************************************************
 *PM_CM_STATUS - CM Status register for Power Controller
 ***************************************************************************/
/* AON_CTRL :: PM_CM_STATUS :: reserved0 [31:16] */
#define BCHP_AON_CTRL_PM_CM_STATUS_reserved0_MASK                  0xffff0000
#define BCHP_AON_CTRL_PM_CM_STATUS_reserved0_SHIFT                 16

/* AON_CTRL :: PM_CM_STATUS :: pm_battery_failsafe_timer_expired_flag [15:15] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_battery_failsafe_timer_expired_flag_MASK 0x00008000
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_battery_failsafe_timer_expired_flag_SHIFT 15

/* AON_CTRL :: PM_CM_STATUS :: pm_auto_battery_mode_rules [14:14] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_auto_battery_mode_rules_MASK 0x00004000
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_auto_battery_mode_rules_SHIFT 14

/* AON_CTRL :: PM_CM_STATUS :: pm_cm_s3_wakeup_reset_ [13:13] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_cm_s3_wakeup_reset__MASK     0x00002000
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_cm_s3_wakeup_reset__SHIFT    13

/* AON_CTRL :: PM_CM_STATUS :: pm_standby_b [12:12] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_standby_b_MASK               0x00001000
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_standby_b_SHIFT              12

/* AON_CTRL :: PM_CM_STATUS :: pm_ignore_inputs_ng [11:11] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_ignore_inputs_ng_MASK        0x00000800
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_ignore_inputs_ng_SHIFT       11

/* AON_CTRL :: PM_CM_STATUS :: pm_ignore_inputs [10:10] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_ignore_inputs_MASK           0x00000400
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_ignore_inputs_SHIFT          10

/* AON_CTRL :: PM_CM_STATUS :: pm_pwrdn_pll_req [09:09] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_pwrdn_pll_req_MASK           0x00000200
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_pwrdn_pll_req_SHIFT          9

/* AON_CTRL :: PM_CM_STATUS :: pm_dis_xtal_clocks [08:08] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dis_xtal_clocks_MASK         0x00000100
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dis_xtal_clocks_SHIFT        8

/* AON_CTRL :: PM_CM_STATUS :: pm_dis_all_clocks [07:07] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dis_all_clocks_MASK          0x00000080
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dis_all_clocks_SHIFT         7

/* AON_CTRL :: PM_CM_STATUS :: pm_dphy_standby [06:06] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dphy_standby_MASK            0x00000040
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dphy_standby_SHIFT           6

/* AON_CTRL :: PM_CM_STATUS :: pm_hardware_battery_mode_transition [05:05] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_hardware_battery_mode_transition_MASK 0x00000020
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_hardware_battery_mode_transition_SHIFT 5

/* AON_CTRL :: PM_CM_STATUS :: pm_bmu_intr_ap_lost_level [04:04] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_bmu_intr_ap_lost_level_MASK  0x00000010
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_bmu_intr_ap_lost_level_SHIFT 4

/* AON_CTRL :: PM_CM_STATUS :: pm_gisb_idle_status [03:03] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_gisb_idle_status_MASK        0x00000008
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_gisb_idle_status_SHIFT       3

/* AON_CTRL :: PM_CM_STATUS :: pm_avs_ready_for_pwrdn [02:02] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_avs_ready_for_pwrdn_MASK     0x00000004
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_avs_ready_for_pwrdn_SHIFT    2

/* AON_CTRL :: PM_CM_STATUS :: pm_u2u_deregister [01:01] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_u2u_deregister_MASK          0x00000002
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_u2u_deregister_SHIFT         1

/* AON_CTRL :: PM_CM_STATUS :: pm_dram_ready_for_pwrdn [00:00] */
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dram_ready_for_pwrdn_MASK    0x00000001
#define BCHP_AON_CTRL_PM_CM_STATUS_pm_dram_ready_for_pwrdn_SHIFT   0

/***************************************************************************
 *HLCD_CTRL - HW LED Clock Driver Control
 ***************************************************************************/
/* AON_CTRL :: HLCD_CTRL :: reserved0 [31:02] */
#define BCHP_AON_CTRL_HLCD_CTRL_reserved0_MASK                     0xfffffffc
#define BCHP_AON_CTRL_HLCD_CTRL_reserved0_SHIFT                    2

/* AON_CTRL :: HLCD_CTRL :: hlcd_enable_status [01:01] */
#define BCHP_AON_CTRL_HLCD_CTRL_hlcd_enable_status_MASK            0x00000002
#define BCHP_AON_CTRL_HLCD_CTRL_hlcd_enable_status_SHIFT           1

/* AON_CTRL :: HLCD_CTRL :: hlcd_enable [00:00] */
#define BCHP_AON_CTRL_HLCD_CTRL_hlcd_enable_MASK                   0x00000001
#define BCHP_AON_CTRL_HLCD_CTRL_hlcd_enable_SHIFT                  0
#define BCHP_AON_CTRL_HLCD_CTRL_hlcd_enable_DEFAULT                0x00000000

/***************************************************************************
 *SECOND_FRACTION_COUNTER - Second Fraction Counter Initial value
 ***************************************************************************/
/* AON_CTRL :: SECOND_FRACTION_COUNTER :: reserved0 [31:25] */
#define BCHP_AON_CTRL_SECOND_FRACTION_COUNTER_reserved0_MASK       0xfe000000
#define BCHP_AON_CTRL_SECOND_FRACTION_COUNTER_reserved0_SHIFT      25

/* AON_CTRL :: SECOND_FRACTION_COUNTER :: second_fraction_counter_init [24:00] */
#define BCHP_AON_CTRL_SECOND_FRACTION_COUNTER_second_fraction_counter_init_MASK 0x01ffffff
#define BCHP_AON_CTRL_SECOND_FRACTION_COUNTER_second_fraction_counter_init_SHIFT 0
#define BCHP_AON_CTRL_SECOND_FRACTION_COUNTER_second_fraction_counter_init_DEFAULT 0x00000000

/***************************************************************************
 *TIME_COUNTER - Hour/Minute Counter Initial value
 ***************************************************************************/
/* AON_CTRL :: TIME_COUNTER :: reserved0 [31:20] */
#define BCHP_AON_CTRL_TIME_COUNTER_reserved0_MASK                  0xfff00000
#define BCHP_AON_CTRL_TIME_COUNTER_reserved0_SHIFT                 20

/* AON_CTRL :: TIME_COUNTER :: hour_display_mode [19:19] */
#define BCHP_AON_CTRL_TIME_COUNTER_hour_display_mode_MASK          0x00080000
#define BCHP_AON_CTRL_TIME_COUNTER_hour_display_mode_SHIFT         19
#define BCHP_AON_CTRL_TIME_COUNTER_hour_display_mode_DEFAULT       0x00000000

/* AON_CTRL :: TIME_COUNTER :: mode_12h_24h_init [18:18] */
#define BCHP_AON_CTRL_TIME_COUNTER_mode_12h_24h_init_MASK          0x00040000
#define BCHP_AON_CTRL_TIME_COUNTER_mode_12h_24h_init_SHIFT         18
#define BCHP_AON_CTRL_TIME_COUNTER_mode_12h_24h_init_DEFAULT       0x00000000

/* AON_CTRL :: TIME_COUNTER :: am_pm_counter_init [17:17] */
#define BCHP_AON_CTRL_TIME_COUNTER_am_pm_counter_init_MASK         0x00020000
#define BCHP_AON_CTRL_TIME_COUNTER_am_pm_counter_init_SHIFT        17
#define BCHP_AON_CTRL_TIME_COUNTER_am_pm_counter_init_DEFAULT      0x00000000

/* AON_CTRL :: TIME_COUNTER :: hour_counter_init [16:12] */
#define BCHP_AON_CTRL_TIME_COUNTER_hour_counter_init_MASK          0x0001f000
#define BCHP_AON_CTRL_TIME_COUNTER_hour_counter_init_SHIFT         12
#define BCHP_AON_CTRL_TIME_COUNTER_hour_counter_init_DEFAULT       0x00000000

/* AON_CTRL :: TIME_COUNTER :: minute_counter_init [11:06] */
#define BCHP_AON_CTRL_TIME_COUNTER_minute_counter_init_MASK        0x00000fc0
#define BCHP_AON_CTRL_TIME_COUNTER_minute_counter_init_SHIFT       6
#define BCHP_AON_CTRL_TIME_COUNTER_minute_counter_init_DEFAULT     0x00000000

/* AON_CTRL :: TIME_COUNTER :: second_counter_init [05:00] */
#define BCHP_AON_CTRL_TIME_COUNTER_second_counter_init_MASK        0x0000003f
#define BCHP_AON_CTRL_TIME_COUNTER_second_counter_init_SHIFT       0
#define BCHP_AON_CTRL_TIME_COUNTER_second_counter_init_DEFAULT     0x00000000

/***************************************************************************
 *LED_DIGIT_CODE_0 - Digit Code for digit 0, 1, 2, 3
 ***************************************************************************/
/* AON_CTRL :: LED_DIGIT_CODE_0 :: digit_code_3 [31:24] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_3_MASK           0xff000000
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_3_SHIFT          24
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_3_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_0 :: digit_code_2 [23:16] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_2_MASK           0x00ff0000
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_2_SHIFT          16
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_2_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_0 :: digit_code_1 [15:08] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_1_MASK           0x0000ff00
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_1_SHIFT          8
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_1_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_0 :: digit_code_0 [07:00] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_0_MASK           0x000000ff
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_0_SHIFT          0
#define BCHP_AON_CTRL_LED_DIGIT_CODE_0_digit_code_0_DEFAULT        0x00000000

/***************************************************************************
 *LED_DIGIT_CODE_1 - Digit Code for digit 4, 5, 6, 7
 ***************************************************************************/
/* AON_CTRL :: LED_DIGIT_CODE_1 :: digit_code_7 [31:24] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_7_MASK           0xff000000
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_7_SHIFT          24
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_7_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_1 :: digit_code_6 [23:16] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_6_MASK           0x00ff0000
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_6_SHIFT          16
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_6_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_1 :: digit_code_5 [15:08] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_5_MASK           0x0000ff00
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_5_SHIFT          8
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_5_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_1 :: digit_code_4 [07:00] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_4_MASK           0x000000ff
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_4_SHIFT          0
#define BCHP_AON_CTRL_LED_DIGIT_CODE_1_digit_code_4_DEFAULT        0x00000000

/***************************************************************************
 *LED_DIGIT_CODE_2 - Digit Code for digit 8, 9
 ***************************************************************************/
/* AON_CTRL :: LED_DIGIT_CODE_2 :: reserved0 [31:16] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_reserved0_MASK              0xffff0000
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_reserved0_SHIFT             16

/* AON_CTRL :: LED_DIGIT_CODE_2 :: digit_code_9 [15:08] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_digit_code_9_MASK           0x0000ff00
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_digit_code_9_SHIFT          8
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_digit_code_9_DEFAULT        0x00000000

/* AON_CTRL :: LED_DIGIT_CODE_2 :: digit_code_8 [07:00] */
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_digit_code_8_MASK           0x000000ff
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_digit_code_8_SHIFT          0
#define BCHP_AON_CTRL_LED_DIGIT_CODE_2_digit_code_8_DEFAULT        0x00000000

/***************************************************************************
 *LED_DIGIT_ADDR_OFFSET - Hour MSD/LSD and minute MSD/LSD address offset
 ***************************************************************************/
/* AON_CTRL :: LED_DIGIT_ADDR_OFFSET :: hour_msd_addr_offset [31:24] */
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_hour_msd_addr_offset_MASK 0xff000000
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_hour_msd_addr_offset_SHIFT 24
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_hour_msd_addr_offset_DEFAULT 0x00000020

/* AON_CTRL :: LED_DIGIT_ADDR_OFFSET :: hour_lsd_addr_offset [23:16] */
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_hour_lsd_addr_offset_MASK 0x00ff0000
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_hour_lsd_addr_offset_SHIFT 16
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_hour_lsd_addr_offset_DEFAULT 0x00000024

/* AON_CTRL :: LED_DIGIT_ADDR_OFFSET :: minute_msd_addr_offset [15:08] */
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_minute_msd_addr_offset_MASK 0x0000ff00
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_minute_msd_addr_offset_SHIFT 8
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_minute_msd_addr_offset_DEFAULT 0x00000018

/* AON_CTRL :: LED_DIGIT_ADDR_OFFSET :: minute_lsd_addr_offset [07:00] */
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_minute_lsd_addr_offset_MASK 0x000000ff
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_minute_lsd_addr_offset_SHIFT 0
#define BCHP_AON_CTRL_LED_DIGIT_ADDR_OFFSET_minute_lsd_addr_offset_DEFAULT 0x0000001c

/***************************************************************************
 *LED_STATUS_CTRL - LED status control
 ***************************************************************************/
/* AON_CTRL :: LED_STATUS_CTRL :: reserved0 [31:28] */
#define BCHP_AON_CTRL_LED_STATUS_CTRL_reserved0_MASK               0xf0000000
#define BCHP_AON_CTRL_LED_STATUS_CTRL_reserved0_SHIFT              28

/* AON_CTRL :: LED_STATUS_CTRL :: hlcd_state [27:25] */
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_MASK              0x0e000000
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_SHIFT             25
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_IDLE         0
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_COUNT        1
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_PROGRAM_MINUTE_LSD 2
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_PROGRAM_MINUTE_MSD 3
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_PROGRAM_HOUR_LSD 4
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_PROGRAM_HOUR_MSD 5
#define BCHP_AON_CTRL_LED_STATUS_CTRL_hlcd_state_HLCD_PROGRAM_STATUS 6

/* AON_CTRL :: LED_STATUS_CTRL :: status_update_enable [24:24] */
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_update_enable_MASK    0x01000000
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_update_enable_SHIFT   24
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_update_enable_DEFAULT 0x00000000

/* AON_CTRL :: LED_STATUS_CTRL :: status_mask [23:12] */
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_mask_MASK             0x00fff000
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_mask_SHIFT            12
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_mask_DEFAULT          0x00000000

/* AON_CTRL :: LED_STATUS_CTRL :: status_bit_offset [11:08] */
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_bit_offset_MASK       0x00000f00
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_bit_offset_SHIFT      8
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_bit_offset_DEFAULT    0x00000000

/* AON_CTRL :: LED_STATUS_CTRL :: status_addr_offset [07:00] */
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_addr_offset_MASK      0x000000ff
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_addr_offset_SHIFT     0
#define BCHP_AON_CTRL_LED_STATUS_CTRL_status_addr_offset_DEFAULT   0x00000000

/***************************************************************************
 *GENERAL_CTRL_0 - General control register 0
 ***************************************************************************/
/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_31 [31:31] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_31_MASK         0x80000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_31_SHIFT        31
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_31_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_30 [30:30] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_30_MASK         0x40000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_30_SHIFT        30
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_30_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_29 [29:29] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_29_MASK         0x20000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_29_SHIFT        29
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_29_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_28 [28:28] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_28_MASK         0x10000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_28_SHIFT        28
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_28_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_27 [27:27] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_27_MASK         0x08000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_27_SHIFT        27
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_27_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_26 [26:26] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_26_MASK         0x04000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_26_SHIFT        26
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_26_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_25 [25:25] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_25_MASK         0x02000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_25_SHIFT        25
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_25_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_24 [24:24] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_24_MASK         0x01000000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_24_SHIFT        24
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_24_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_23 [23:23] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_23_MASK         0x00800000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_23_SHIFT        23
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_23_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_22 [22:22] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_22_MASK         0x00400000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_22_SHIFT        22
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_22_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_21 [21:21] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_21_MASK         0x00200000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_21_SHIFT        21
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_21_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_20 [20:20] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_20_MASK         0x00100000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_20_SHIFT        20
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_20_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_19 [19:19] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_19_MASK         0x00080000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_19_SHIFT        19
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_19_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_18 [18:18] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_18_MASK         0x00040000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_18_SHIFT        18
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_18_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_17 [17:17] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_17_MASK         0x00020000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_17_SHIFT        17
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_17_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_16 [16:16] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_16_MASK         0x00010000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_16_SHIFT        16
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_16_DEFAULT      0x00000001

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_15 [15:15] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_15_MASK         0x00008000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_15_SHIFT        15
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_15_DEFAULT      0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_14 [14:14] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_14_MASK         0x00004000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_14_SHIFT        14
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_14_DEFAULT      0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_13 [13:13] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_13_MASK         0x00002000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_13_SHIFT        13
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_13_DEFAULT      0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_12 [12:12] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_12_MASK         0x00001000
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_12_SHIFT        12
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_12_DEFAULT      0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_11 [11:11] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_11_MASK         0x00000800
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_11_SHIFT        11
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_11_DEFAULT      0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_10 [10:10] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_10_MASK         0x00000400
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_10_SHIFT        10
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_10_DEFAULT      0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_9 [09:09] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_9_MASK          0x00000200
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_9_SHIFT         9
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_9_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_8 [08:08] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_8_MASK          0x00000100
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_8_SHIFT         8
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_8_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_7 [07:07] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_7_MASK          0x00000080
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_7_SHIFT         7
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_7_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_6 [06:06] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_6_MASK          0x00000040
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_6_SHIFT         6
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_6_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_5 [05:05] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_5_MASK          0x00000020
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_5_SHIFT         5
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_5_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_4 [04:04] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_4_MASK          0x00000010
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_4_SHIFT         4
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_4_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_3 [03:03] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_3_MASK          0x00000008
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_3_SHIFT         3
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_3_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_2 [02:02] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_2_MASK          0x00000004
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_2_SHIFT         2
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_2_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_1 [01:01] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_1_MASK          0x00000002
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_1_SHIFT         1
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_1_DEFAULT       0x00000000

/* AON_CTRL :: GENERAL_CTRL_0 :: general_ctrl0_0 [00:00] */
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_0_MASK          0x00000001
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_0_SHIFT         0
#define BCHP_AON_CTRL_GENERAL_CTRL_0_general_ctrl0_0_DEFAULT       0x00000000

/***************************************************************************
 *GENERAL_STATUS_0 - General status register 0
 ***************************************************************************/
/* AON_CTRL :: GENERAL_STATUS_0 :: reserved0 [31:08] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_reserved0_MASK              0xffffff00
#define BCHP_AON_CTRL_GENERAL_STATUS_0_reserved0_SHIFT             8

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_7 [07:07] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_7_MASK      0x00000080
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_7_SHIFT     7

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_6 [06:06] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_6_MASK      0x00000040
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_6_SHIFT     6

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_5 [05:05] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_5_MASK      0x00000020
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_5_SHIFT     5

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_4 [04:04] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_4_MASK      0x00000010
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_4_SHIFT     4

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_3 [03:03] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_3_MASK      0x00000008
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_3_SHIFT     3

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_2 [02:02] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_2_MASK      0x00000004
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_2_SHIFT     2

/* AON_CTRL :: GENERAL_STATUS_0 :: general_status0_1 [01:01] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_1_MASK      0x00000002
#define BCHP_AON_CTRL_GENERAL_STATUS_0_general_status0_1_SHIFT     1

/* AON_CTRL :: GENERAL_STATUS_0 :: ejtag_ce_wakeup_event [00:00] */
#define BCHP_AON_CTRL_GENERAL_STATUS_0_ejtag_ce_wakeup_event_MASK  0x00000001
#define BCHP_AON_CTRL_GENERAL_STATUS_0_ejtag_ce_wakeup_event_SHIFT 0

/***************************************************************************
 *GENERAL_CTRL_NO_SCAN_0 - General control register without scan 0
 ***************************************************************************/
/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_31 [31:31] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_31_MASK 0x80000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_31_SHIFT 31
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_31_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_30 [30:30] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_30_MASK 0x40000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_30_SHIFT 30
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_30_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_29 [29:29] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_29_MASK 0x20000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_29_SHIFT 29
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_29_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_28 [28:28] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_28_MASK 0x10000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_28_SHIFT 28
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_28_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_27 [27:27] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_27_MASK 0x08000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_27_SHIFT 27
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_27_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_26 [26:26] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_26_MASK 0x04000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_26_SHIFT 26
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_26_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_25 [25:25] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_25_MASK 0x02000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_25_SHIFT 25
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_25_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_24 [24:24] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_24_MASK 0x01000000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_24_SHIFT 24
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_24_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_23 [23:23] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_23_MASK 0x00800000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_23_SHIFT 23
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_23_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_22 [22:22] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_22_MASK 0x00400000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_22_SHIFT 22
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_22_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_21 [21:21] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_21_MASK 0x00200000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_21_SHIFT 21
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_21_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_20 [20:20] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_20_MASK 0x00100000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_20_SHIFT 20
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_20_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_19 [19:19] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_19_MASK 0x00080000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_19_SHIFT 19
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_19_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_18 [18:18] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_18_MASK 0x00040000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_18_SHIFT 18
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_18_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_17 [17:17] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_17_MASK 0x00020000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_17_SHIFT 17
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_17_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_16 [16:16] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_16_MASK 0x00010000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_16_SHIFT 16
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_16_DEFAULT 0x00000001

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_15 [15:15] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_15_MASK 0x00008000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_15_SHIFT 15
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_15_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_14 [14:14] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_14_MASK 0x00004000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_14_SHIFT 14
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_14_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_13 [13:13] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_13_MASK 0x00002000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_13_SHIFT 13
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_13_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_12 [12:12] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_12_MASK 0x00001000
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_12_SHIFT 12
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_12_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_11 [11:11] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_11_MASK 0x00000800
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_11_SHIFT 11
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_11_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_10 [10:10] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_10_MASK 0x00000400
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_10_SHIFT 10
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_10_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_9 [09:09] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_9_MASK 0x00000200
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_9_SHIFT 9
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_9_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_8 [08:08] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_8_MASK 0x00000100
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_8_SHIFT 8
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_8_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_7 [07:07] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_7_MASK 0x00000080
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_7_SHIFT 7
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_7_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_6 [06:06] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_6_MASK 0x00000040
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_6_SHIFT 6
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_6_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_5 [05:05] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_5_MASK 0x00000020
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_5_SHIFT 5
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_5_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_4 [04:04] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_4_MASK 0x00000010
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_4_SHIFT 4
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_4_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_3 [03:03] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_3_MASK 0x00000008
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_3_SHIFT 3
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_3_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_2 [02:02] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_2_MASK 0x00000004
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_2_SHIFT 2
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_2_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_1 [01:01] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_1_MASK 0x00000002
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_1_SHIFT 1
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_1_DEFAULT 0x00000000

/* AON_CTRL :: GENERAL_CTRL_NO_SCAN_0 :: general_ctrl_no_scan0_0 [00:00] */
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_0_MASK 0x00000001
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_0_SHIFT 0
#define BCHP_AON_CTRL_GENERAL_CTRL_NO_SCAN_0_general_ctrl_no_scan0_0_DEFAULT 0x00000000

/***************************************************************************
 *PM_BATTERY_MODE_DEBUG_STATUS - Battery Mode Debug Status
 ***************************************************************************/
/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: reserved0 [31:14] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_reserved0_MASK  0xffffc000
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_reserved0_SHIFT 14

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_battery_failsafe_timer_expired_flag [13:13] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_battery_failsafe_timer_expired_flag_MASK 0x00002000
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_battery_failsafe_timer_expired_flag_SHIFT 13

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_hardware_battery_mode_transition [12:12] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_hardware_battery_mode_transition_MASK 0x00001000
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_hardware_battery_mode_transition_SHIFT 12

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_gisb_idle_status [11:11] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_gisb_idle_status_MASK 0x00000800
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_gisb_idle_status_SHIFT 11

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_avs_ready_for_pwrdn [10:10] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_avs_ready_for_pwrdn_MASK 0x00000400
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_avs_ready_for_pwrdn_SHIFT 10

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_u2u_deregister [09:09] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_u2u_deregister_MASK 0x00000200
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_u2u_deregister_SHIFT 9

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_dram_ready_for_pwrdn [08:08] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_dram_ready_for_pwrdn_MASK 0x00000100
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_dram_ready_for_pwrdn_SHIFT 8

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_bsp_ready_for_pwrdn [07:07] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_bsp_ready_for_pwrdn_MASK 0x00000080
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_bsp_ready_for_pwrdn_SHIFT 7

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_cpu_ready_for_pwrdn [06:06] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_cpu_ready_for_pwrdn_MASK 0x00000040
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_cpu_ready_for_pwrdn_SHIFT 6

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_sec_avd_rptd_clk_disable [05:05] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_sec_avd_rptd_clk_disable_MASK 0x00000020
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_sec_avd_rptd_clk_disable_SHIFT 5

/* AON_CTRL :: PM_BATTERY_MODE_DEBUG_STATUS :: pm_state [04:00] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_MASK   0x0000001f
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_SHIFT  0
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_ACTIVE 0
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_PWRDN_RDY 1
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DISABLE_AVD_RPTD 2
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DISABLE_CPU 3
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_TRANSITION_TO_STANDBY 4
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_STANDBY 5
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_STANDBY_WITH_PLLS_ON 6
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_HOLD_CPU_POWERED_DOWN 7
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_POWER_UP_CPU 8
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_TRANSITION_TO_ACTIVE 9
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_FAST_PWRDN 10
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY_ENTRY_S1 11
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY_COLD_ENTRY_S2 12
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY_WARM_ENTRY_S2 13
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY_ENTRY_S3 14
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY 15
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY_EXIT_S1 16
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_DEEP_STANDBY_EXIT_S2 17
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY_ENTRY_S1 18
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY_COLD_ENTRY_S2 19
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY_WARM_ENTRY_S2 20
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY_ENTRY_S3 21
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY 22
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY_EXIT_S1 23
#define BCHP_AON_CTRL_PM_BATTERY_MODE_DEBUG_STATUS_pm_state_PM_BATTERY_STANDBY_EXIT_S2 24

/***************************************************************************
 *PM_BATTERY_MODE_FAILSAFE_TIMER - Battery Standby Mode Failsafe Timer
 ***************************************************************************/
/* AON_CTRL :: PM_BATTERY_MODE_FAILSAFE_TIMER :: reserved0 [31:23] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_FAILSAFE_TIMER_reserved0_MASK 0xff800000
#define BCHP_AON_CTRL_PM_BATTERY_MODE_FAILSAFE_TIMER_reserved0_SHIFT 23

/* AON_CTRL :: PM_BATTERY_MODE_FAILSAFE_TIMER :: counter_start_value [22:00] */
#define BCHP_AON_CTRL_PM_BATTERY_MODE_FAILSAFE_TIMER_counter_start_value_MASK 0x007fffff
#define BCHP_AON_CTRL_PM_BATTERY_MODE_FAILSAFE_TIMER_counter_start_value_SHIFT 0
#define BCHP_AON_CTRL_PM_BATTERY_MODE_FAILSAFE_TIMER_counter_start_value_DEFAULT 0x0001a5e0

/***************************************************************************
 *REBOOT_ON_POWERLOSS_TIMER - Reboot on AC Powerloss Timer
 ***************************************************************************/
/* AON_CTRL :: REBOOT_ON_POWERLOSS_TIMER :: reserved0 [31:27] */
#define BCHP_AON_CTRL_REBOOT_ON_POWERLOSS_TIMER_reserved0_MASK     0xf8000000
#define BCHP_AON_CTRL_REBOOT_ON_POWERLOSS_TIMER_reserved0_SHIFT    27

/* AON_CTRL :: REBOOT_ON_POWERLOSS_TIMER :: counter_start_value [26:00] */
#define BCHP_AON_CTRL_REBOOT_ON_POWERLOSS_TIMER_counter_start_value_MASK 0x07ffffff
#define BCHP_AON_CTRL_REBOOT_ON_POWERLOSS_TIMER_counter_start_value_SHIFT 0
#define BCHP_AON_CTRL_REBOOT_ON_POWERLOSS_TIMER_counter_start_value_DEFAULT 0x00000000

/***************************************************************************
 *UNCLEARED_SCRATCH - Scratch register
 ***************************************************************************/
/* AON_CTRL :: UNCLEARED_SCRATCH :: uncleared_scratch [31:00] */
#define BCHP_AON_CTRL_UNCLEARED_SCRATCH_uncleared_scratch_MASK     0xffffffff
#define BCHP_AON_CTRL_UNCLEARED_SCRATCH_uncleared_scratch_SHIFT    0
#define BCHP_AON_CTRL_UNCLEARED_SCRATCH_uncleared_scratch_DEFAULT  0x00000000

/***************************************************************************
 *RESET_HISTORY - Reset History Register For AON
 ***************************************************************************/
/* AON_CTRL :: RESET_HISTORY :: aux_chip_level_reset_0 [31:31] */
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_level_reset_0_MASK    0x80000000
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_level_reset_0_SHIFT   31
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_level_reset_0_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: aux_chip_edge_reset_1 [30:30] */
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_edge_reset_1_MASK     0x40000000
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_edge_reset_1_SHIFT    30
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_edge_reset_1_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: aux_chip_edge_reset_0 [29:29] */
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_edge_reset_0_MASK     0x20000000
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_edge_reset_0_SHIFT    29
#define BCHP_AON_CTRL_RESET_HISTORY_aux_chip_edge_reset_0_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: scpu_ejtag_reset [28:28] */
#define BCHP_AON_CTRL_RESET_HISTORY_scpu_ejtag_reset_MASK          0x10000000
#define BCHP_AON_CTRL_RESET_HISTORY_scpu_ejtag_reset_SHIFT         28
#define BCHP_AON_CTRL_RESET_HISTORY_scpu_ejtag_reset_DEFAULT       0x00000000

/* AON_CTRL :: RESET_HISTORY :: rg_cpu_ejtag_reset [27:27] */
#define BCHP_AON_CTRL_RESET_HISTORY_rg_cpu_ejtag_reset_MASK        0x08000000
#define BCHP_AON_CTRL_RESET_HISTORY_rg_cpu_ejtag_reset_SHIFT       27
#define BCHP_AON_CTRL_RESET_HISTORY_rg_cpu_ejtag_reset_DEFAULT     0x00000000

/* AON_CTRL :: RESET_HISTORY :: cm_cpu_ejtag_reset [26:26] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_cpu_ejtag_reset_MASK        0x04000000
#define BCHP_AON_CTRL_RESET_HISTORY_cm_cpu_ejtag_reset_SHIFT       26
#define BCHP_AON_CTRL_RESET_HISTORY_cm_cpu_ejtag_reset_DEFAULT     0x00000000

/* AON_CTRL :: RESET_HISTORY :: host_cpu_ejtag_reset [25:25] */
#define BCHP_AON_CTRL_RESET_HISTORY_host_cpu_ejtag_reset_MASK      0x02000000
#define BCHP_AON_CTRL_RESET_HISTORY_host_cpu_ejtag_reset_SHIFT     25
#define BCHP_AON_CTRL_RESET_HISTORY_host_cpu_ejtag_reset_DEFAULT   0x00000000

/* AON_CTRL :: RESET_HISTORY :: powerloss_reset [24:24] */
#define BCHP_AON_CTRL_RESET_HISTORY_powerloss_reset_MASK           0x01000000
#define BCHP_AON_CTRL_RESET_HISTORY_powerloss_reset_SHIFT          24

/* AON_CTRL :: RESET_HISTORY :: cm_overvoltage_1_reset [23:23] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_overvoltage_1_reset_MASK    0x00800000
#define BCHP_AON_CTRL_RESET_HISTORY_cm_overvoltage_1_reset_SHIFT   23
#define BCHP_AON_CTRL_RESET_HISTORY_cm_overvoltage_1_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: cm_undervoltage_1_reset [22:22] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_undervoltage_1_reset_MASK   0x00400000
#define BCHP_AON_CTRL_RESET_HISTORY_cm_undervoltage_1_reset_SHIFT  22
#define BCHP_AON_CTRL_RESET_HISTORY_cm_undervoltage_1_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: cm_undervoltage_0_reset [21:21] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_undervoltage_0_reset_MASK   0x00200000
#define BCHP_AON_CTRL_RESET_HISTORY_cm_undervoltage_0_reset_SHIFT  21
#define BCHP_AON_CTRL_RESET_HISTORY_cm_undervoltage_0_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: overvoltage_1_reset [20:20] */
#define BCHP_AON_CTRL_RESET_HISTORY_overvoltage_1_reset_MASK       0x00100000
#define BCHP_AON_CTRL_RESET_HISTORY_overvoltage_1_reset_SHIFT      20
#define BCHP_AON_CTRL_RESET_HISTORY_overvoltage_1_reset_DEFAULT    0x00000000

/* AON_CTRL :: RESET_HISTORY :: undervoltage_1_reset [19:19] */
#define BCHP_AON_CTRL_RESET_HISTORY_undervoltage_1_reset_MASK      0x00080000
#define BCHP_AON_CTRL_RESET_HISTORY_undervoltage_1_reset_SHIFT     19
#define BCHP_AON_CTRL_RESET_HISTORY_undervoltage_1_reset_DEFAULT   0x00000000

/* AON_CTRL :: RESET_HISTORY :: undervoltage_0_reset [18:18] */
#define BCHP_AON_CTRL_RESET_HISTORY_undervoltage_0_reset_MASK      0x00040000
#define BCHP_AON_CTRL_RESET_HISTORY_undervoltage_0_reset_SHIFT     18
#define BCHP_AON_CTRL_RESET_HISTORY_undervoltage_0_reset_DEFAULT   0x00000000

/* AON_CTRL :: RESET_HISTORY :: cm_overtemp_reset [17:17] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_overtemp_reset_MASK         0x00020000
#define BCHP_AON_CTRL_RESET_HISTORY_cm_overtemp_reset_SHIFT        17
#define BCHP_AON_CTRL_RESET_HISTORY_cm_overtemp_reset_DEFAULT      0x00000000

/* AON_CTRL :: RESET_HISTORY :: overtemp_reset [16:16] */
#define BCHP_AON_CTRL_RESET_HISTORY_overtemp_reset_MASK            0x00010000
#define BCHP_AON_CTRL_RESET_HISTORY_overtemp_reset_SHIFT           16
#define BCHP_AON_CTRL_RESET_HISTORY_overtemp_reset_DEFAULT         0x00000000

/* AON_CTRL :: RESET_HISTORY :: security_master_reset [15:15] */
#define BCHP_AON_CTRL_RESET_HISTORY_security_master_reset_MASK     0x00008000
#define BCHP_AON_CTRL_RESET_HISTORY_security_master_reset_SHIFT    15
#define BCHP_AON_CTRL_RESET_HISTORY_security_master_reset_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: aux_software_master_reset [14:14] */
#define BCHP_AON_CTRL_RESET_HISTORY_aux_software_master_reset_MASK 0x00004000
#define BCHP_AON_CTRL_RESET_HISTORY_aux_software_master_reset_SHIFT 14

/* AON_CTRL :: RESET_HISTORY :: local_software_master_reset [13:13] */
#define BCHP_AON_CTRL_RESET_HISTORY_local_software_master_reset_MASK 0x00002000
#define BCHP_AON_CTRL_RESET_HISTORY_local_software_master_reset_SHIFT 13

/* AON_CTRL :: RESET_HISTORY :: software_master_reset [12:12] */
#define BCHP_AON_CTRL_RESET_HISTORY_software_master_reset_MASK     0x00001000
#define BCHP_AON_CTRL_RESET_HISTORY_software_master_reset_SHIFT    12
#define BCHP_AON_CTRL_RESET_HISTORY_software_master_reset_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: pcie_1_hot_boot_reset [11:11] */
#define BCHP_AON_CTRL_RESET_HISTORY_pcie_1_hot_boot_reset_MASK     0x00000800
#define BCHP_AON_CTRL_RESET_HISTORY_pcie_1_hot_boot_reset_SHIFT    11
#define BCHP_AON_CTRL_RESET_HISTORY_pcie_1_hot_boot_reset_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: pcie_0_hot_boot_reset [10:10] */
#define BCHP_AON_CTRL_RESET_HISTORY_pcie_0_hot_boot_reset_MASK     0x00000400
#define BCHP_AON_CTRL_RESET_HISTORY_pcie_0_hot_boot_reset_SHIFT    10
#define BCHP_AON_CTRL_RESET_HISTORY_pcie_0_hot_boot_reset_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: rg_watchdog_timer_reset [09:09] */
#define BCHP_AON_CTRL_RESET_HISTORY_rg_watchdog_timer_reset_MASK   0x00000200
#define BCHP_AON_CTRL_RESET_HISTORY_rg_watchdog_timer_reset_SHIFT  9
#define BCHP_AON_CTRL_RESET_HISTORY_rg_watchdog_timer_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: cm_watchdog_timer_reset [08:08] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_watchdog_timer_reset_MASK   0x00000100
#define BCHP_AON_CTRL_RESET_HISTORY_cm_watchdog_timer_reset_SHIFT  8
#define BCHP_AON_CTRL_RESET_HISTORY_cm_watchdog_timer_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: host_watchdog_timer_reset [07:07] */
#define BCHP_AON_CTRL_RESET_HISTORY_host_watchdog_timer_reset_MASK 0x00000080
#define BCHP_AON_CTRL_RESET_HISTORY_host_watchdog_timer_reset_SHIFT 7
#define BCHP_AON_CTRL_RESET_HISTORY_host_watchdog_timer_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: smartcard_insert_reset [06:06] */
#define BCHP_AON_CTRL_RESET_HISTORY_smartcard_insert_reset_MASK    0x00000040
#define BCHP_AON_CTRL_RESET_HISTORY_smartcard_insert_reset_SHIFT   6
#define BCHP_AON_CTRL_RESET_HISTORY_smartcard_insert_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: cm_s3_wakeup_reset [05:05] */
#define BCHP_AON_CTRL_RESET_HISTORY_cm_s3_wakeup_reset_MASK        0x00000020
#define BCHP_AON_CTRL_RESET_HISTORY_cm_s3_wakeup_reset_SHIFT       5
#define BCHP_AON_CTRL_RESET_HISTORY_cm_s3_wakeup_reset_DEFAULT     0x00000000

/* AON_CTRL :: RESET_HISTORY :: s3_wakeup_reset [04:04] */
#define BCHP_AON_CTRL_RESET_HISTORY_s3_wakeup_reset_MASK           0x00000010
#define BCHP_AON_CTRL_RESET_HISTORY_s3_wakeup_reset_SHIFT          4
#define BCHP_AON_CTRL_RESET_HISTORY_s3_wakeup_reset_DEFAULT        0x00000000

/* AON_CTRL :: RESET_HISTORY :: front_panel_4sec_reset [03:03] */
#define BCHP_AON_CTRL_RESET_HISTORY_front_panel_4sec_reset_MASK    0x00000008
#define BCHP_AON_CTRL_RESET_HISTORY_front_panel_4sec_reset_SHIFT   3
#define BCHP_AON_CTRL_RESET_HISTORY_front_panel_4sec_reset_DEFAULT 0x00000000

/* AON_CTRL :: RESET_HISTORY :: tap_in_system_reset [02:02] */
#define BCHP_AON_CTRL_RESET_HISTORY_tap_in_system_reset_MASK       0x00000004
#define BCHP_AON_CTRL_RESET_HISTORY_tap_in_system_reset_SHIFT      2
#define BCHP_AON_CTRL_RESET_HISTORY_tap_in_system_reset_DEFAULT    0x00000000

/* AON_CTRL :: RESET_HISTORY :: main_chip_reset_input [01:01] */
#define BCHP_AON_CTRL_RESET_HISTORY_main_chip_reset_input_MASK     0x00000002
#define BCHP_AON_CTRL_RESET_HISTORY_main_chip_reset_input_SHIFT    1
#define BCHP_AON_CTRL_RESET_HISTORY_main_chip_reset_input_DEFAULT  0x00000000

/* AON_CTRL :: RESET_HISTORY :: power_on_reset [00:00] */
#define BCHP_AON_CTRL_RESET_HISTORY_power_on_reset_MASK            0x00000001
#define BCHP_AON_CTRL_RESET_HISTORY_power_on_reset_SHIFT           0
#define BCHP_AON_CTRL_RESET_HISTORY_power_on_reset_DEFAULT         0x00000001

/***************************************************************************
 *NMI_CTRL - Control register for NMI
 ***************************************************************************/
/* AON_CTRL :: NMI_CTRL :: nmi_config_lock [31:31] */
#define BCHP_AON_CTRL_NMI_CTRL_nmi_config_lock_MASK                0x80000000
#define BCHP_AON_CTRL_NMI_CTRL_nmi_config_lock_SHIFT               31
#define BCHP_AON_CTRL_NMI_CTRL_nmi_config_lock_DEFAULT             0x00000000

/* AON_CTRL :: NMI_CTRL :: reserved0 [30:03] */
#define BCHP_AON_CTRL_NMI_CTRL_reserved0_MASK                      0x7ffffff8
#define BCHP_AON_CTRL_NMI_CTRL_reserved0_SHIFT                     3

/* AON_CTRL :: NMI_CTRL :: nmi_pad_monitor [02:02] */
#define BCHP_AON_CTRL_NMI_CTRL_nmi_pad_monitor_MASK                0x00000004
#define BCHP_AON_CTRL_NMI_CTRL_nmi_pad_monitor_SHIFT               2

/* AON_CTRL :: NMI_CTRL :: config_nmi_polarity [01:01] */
#define BCHP_AON_CTRL_NMI_CTRL_config_nmi_polarity_MASK            0x00000002
#define BCHP_AON_CTRL_NMI_CTRL_config_nmi_polarity_SHIFT           1
#define BCHP_AON_CTRL_NMI_CTRL_config_nmi_polarity_DEFAULT         0x00000000

/* AON_CTRL :: NMI_CTRL :: disable_pad_nmi [00:00] */
#define BCHP_AON_CTRL_NMI_CTRL_disable_pad_nmi_MASK                0x00000001
#define BCHP_AON_CTRL_NMI_CTRL_disable_pad_nmi_SHIFT               0
#define BCHP_AON_CTRL_NMI_CTRL_disable_pad_nmi_DEFAULT             0x00000001

/***************************************************************************
 *ANA_XTAL_CONTROL - Ana xtal gisb control
 ***************************************************************************/
/* AON_CTRL :: ANA_XTAL_CONTROL :: reserved0 [31:22] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_reserved0_MASK              0xffc00000
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_reserved0_SHIFT             22

/* AON_CTRL :: ANA_XTAL_CONTROL :: en_osc_cmos_in_s3 [21:16] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_en_osc_cmos_in_s3_MASK      0x003f0000
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_en_osc_cmos_in_s3_SHIFT     16
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_en_osc_cmos_in_s3_DEFAULT   0x00000000

/* AON_CTRL :: ANA_XTAL_CONTROL :: en_osc_cml_in_s3 [15:12] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_en_osc_cml_in_s3_MASK       0x0000f000
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_en_osc_cml_in_s3_SHIFT      12
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_en_osc_cml_in_s3_DEFAULT    0x00000000

/* AON_CTRL :: ANA_XTAL_CONTROL :: osc_ldo_ctrl [11:08] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_ldo_ctrl_MASK           0x00000f00
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_ldo_ctrl_SHIFT          8
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_ldo_ctrl_DEFAULT        0x00000005

/* AON_CTRL :: ANA_XTAL_CONTROL :: osc_select_current_gisb_control [07:07] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_select_current_gisb_control_MASK 0x00000080
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_select_current_gisb_control_SHIFT 7
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_select_current_gisb_control_DEFAULT 0x00000000

/* AON_CTRL :: ANA_XTAL_CONTROL :: osc_cml_sel_pd [06:03] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_cml_sel_pd_MASK         0x00000078
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_cml_sel_pd_SHIFT        3
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_cml_sel_pd_DEFAULT      0x00000000

/* AON_CTRL :: ANA_XTAL_CONTROL :: osc_d2cbias_gisb_control [02:00] */
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_d2cbias_gisb_control_MASK 0x00000007
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_d2cbias_gisb_control_SHIFT 0
#define BCHP_AON_CTRL_ANA_XTAL_CONTROL_osc_d2cbias_gisb_control_DEFAULT 0x00000004

/***************************************************************************
 *SUB_TEST_MODE_CTRL - Test_mode control register
 ***************************************************************************/
/* AON_CTRL :: SUB_TEST_MODE_CTRL :: reserved0 [31:01] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_CTRL_reserved0_MASK            0xfffffffe
#define BCHP_AON_CTRL_SUB_TEST_MODE_CTRL_reserved0_SHIFT           1

/* AON_CTRL :: SUB_TEST_MODE_CTRL :: use_sub_test_mode_reg_src [00:00] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_CTRL_use_sub_test_mode_reg_src_MASK 0x00000001
#define BCHP_AON_CTRL_SUB_TEST_MODE_CTRL_use_sub_test_mode_reg_src_SHIFT 0
#define BCHP_AON_CTRL_SUB_TEST_MODE_CTRL_use_sub_test_mode_reg_src_DEFAULT 0x00000000

/***************************************************************************
 *SUB_TEST_MODE - Register source for sub_test_mode
 ***************************************************************************/
/* AON_CTRL :: SUB_TEST_MODE :: reserved0 [31:08] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_reserved0_MASK                 0xffffff00
#define BCHP_AON_CTRL_SUB_TEST_MODE_reserved0_SHIFT                8

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_spare_1 [07:07] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spare_1_MASK     0x00000080
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spare_1_SHIFT    7
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spare_1_DEFAULT  0x00000000

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_spare_0 [06:06] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spare_0_MASK     0x00000040
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spare_0_SHIFT    6
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spare_0_DEFAULT  0x00000000

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_fast_tspi [05:05] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_fast_tspi_MASK   0x00000020
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_fast_tspi_SHIFT  5
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_fast_tspi_DEFAULT 0x00000000

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_hold_cpu_in_reset [04:04] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_hold_cpu_in_reset_MASK 0x00000010
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_hold_cpu_in_reset_SHIFT 4
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_hold_cpu_in_reset_DEFAULT 0x00000000

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_spi_slave_enable [03:03] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spi_slave_enable_MASK 0x00000008
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spi_slave_enable_SHIFT 3
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_spi_slave_enable_DEFAULT 0x00000000

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_extend_reset [02:02] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_extend_reset_MASK 0x00000004
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_extend_reset_SHIFT 2
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_extend_reset_DEFAULT 0x00000000

/* AON_CTRL :: SUB_TEST_MODE :: sub_test_mode_bsp_debug [01:00] */
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_bsp_debug_MASK   0x00000003
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_bsp_debug_SHIFT  0
#define BCHP_AON_CTRL_SUB_TEST_MODE_sub_test_mode_bsp_debug_DEFAULT 0x00000000

/***************************************************************************
 *LATCHED_TEST_MODE - Final latched testmode value
 ***************************************************************************/
/* AON_CTRL :: LATCHED_TEST_MODE :: latched_test_mode [31:00] */
#define BCHP_AON_CTRL_LATCHED_TEST_MODE_latched_test_mode_MASK     0xffffffff
#define BCHP_AON_CTRL_LATCHED_TEST_MODE_latched_test_mode_SHIFT    0

/***************************************************************************
 *LATCHED_SUB_TEST_MODE - Final latched sub-testmode value
 ***************************************************************************/
/* AON_CTRL :: LATCHED_SUB_TEST_MODE :: latched_sub_test_mode [31:00] */
#define BCHP_AON_CTRL_LATCHED_SUB_TEST_MODE_latched_sub_test_mode_MASK 0xffffffff
#define BCHP_AON_CTRL_LATCHED_SUB_TEST_MODE_latched_sub_test_mode_SHIFT 0

/***************************************************************************
 *PM_INITIATE - Power down initiate
 ***************************************************************************/
/* AON_CTRL :: PM_INITIATE :: reserved0 [31:08] */
#define BCHP_AON_CTRL_PM_INITIATE_reserved0_MASK                   0xffffff00
#define BCHP_AON_CTRL_PM_INITIATE_reserved0_SHIFT                  8

/* AON_CTRL :: PM_INITIATE :: pm_initiate_7 [07:07] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_7_MASK               0x00000080
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_7_SHIFT              7
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_7_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_6 [06:06] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_6_MASK               0x00000040
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_6_SHIFT              6
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_6_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_5 [05:05] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_5_MASK               0x00000020
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_5_SHIFT              5
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_5_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_4 [04:04] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_4_MASK               0x00000010
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_4_SHIFT              4
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_4_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_3 [03:03] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_3_MASK               0x00000008
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_3_SHIFT              3
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_3_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_2 [02:02] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_2_MASK               0x00000004
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_2_SHIFT              2
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_2_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_1 [01:01] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_1_MASK               0x00000002
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_1_SHIFT              1
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_1_DEFAULT            0x00000000

/* AON_CTRL :: PM_INITIATE :: pm_initiate_0 [00:00] */
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_0_MASK               0x00000001
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_0_SHIFT              0
#define BCHP_AON_CTRL_PM_INITIATE_pm_initiate_0_DEFAULT            0x00000000

/***************************************************************************
 *HOST_MISC_CMDS - Power up restore
 ***************************************************************************/
/* AON_CTRL :: HOST_MISC_CMDS :: reserved0 [31:08] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_reserved0_MASK                0xffffff00
#define BCHP_AON_CTRL_HOST_MISC_CMDS_reserved0_SHIFT               8

/* AON_CTRL :: HOST_MISC_CMDS :: host_misc_cmds_7 [07:07] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_7_MASK         0x00000080
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_7_SHIFT        7
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_7_DEFAULT      0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: host_misc_cmds_6 [06:06] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_6_MASK         0x00000040
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_6_SHIFT        6
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_6_DEFAULT      0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: host_misc_cmds_5 [05:05] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_5_MASK         0x00000020
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_5_SHIFT        5
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_5_DEFAULT      0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: host_misc_cmds_4 [04:04] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_4_MASK         0x00000010
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_4_SHIFT        4
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_4_DEFAULT      0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: host_misc_cmds_3 [03:03] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_3_MASK         0x00000008
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_3_SHIFT        3
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_3_DEFAULT      0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: host_misc_cmds_2 [02:02] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_2_MASK         0x00000004
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_2_SHIFT        2
#define BCHP_AON_CTRL_HOST_MISC_CMDS_host_misc_cmds_2_DEFAULT      0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: dram_scram_key_reuse_req [01:01] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_dram_scram_key_reuse_req_MASK 0x00000002
#define BCHP_AON_CTRL_HOST_MISC_CMDS_dram_scram_key_reuse_req_SHIFT 1
#define BCHP_AON_CTRL_HOST_MISC_CMDS_dram_scram_key_reuse_req_DEFAULT 0x00000000

/* AON_CTRL :: HOST_MISC_CMDS :: pm_restore [00:00] */
#define BCHP_AON_CTRL_HOST_MISC_CMDS_pm_restore_MASK               0x00000001
#define BCHP_AON_CTRL_HOST_MISC_CMDS_pm_restore_SHIFT              0
#define BCHP_AON_CTRL_HOST_MISC_CMDS_pm_restore_DEFAULT            0x00000000

/***************************************************************************
 *ANA_XTAL_EXT_CML_CONTROL - Ana xtal external CML control
 ***************************************************************************/
/* AON_CTRL :: ANA_XTAL_EXT_CML_CONTROL :: reserved0 [31:06] */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_reserved0_MASK      0xffffffc0
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_reserved0_SHIFT     6

/* AON_CTRL :: ANA_XTAL_EXT_CML_CONTROL :: osc_PMSM_S3_pd_buffer [05:05] */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_PMSM_S3_pd_buffer_MASK 0x00000020
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_PMSM_S3_pd_buffer_SHIFT 5
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_PMSM_S3_pd_buffer_DEFAULT 0x00000000

/* AON_CTRL :: ANA_XTAL_EXT_CML_CONTROL :: osc_override_strap [04:04] */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_override_strap_MASK 0x00000010
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_override_strap_SHIFT 4
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_override_strap_DEFAULT 0x00000000

/* AON_CTRL :: ANA_XTAL_EXT_CML_CONTROL :: osc_pd_buffer [03:03] */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_pd_buffer_MASK  0x00000008
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_pd_buffer_SHIFT 3
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_pd_buffer_DEFAULT 0x00000000

/* AON_CTRL :: ANA_XTAL_EXT_CML_CONTROL :: osc_div2_sel [02:02] */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_div2_sel_MASK   0x00000004
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_div2_sel_SHIFT  2
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_div2_sel_DEFAULT 0x00000001

/* AON_CTRL :: ANA_XTAL_EXT_CML_CONTROL :: osc_current [01:00] */
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_current_MASK    0x00000003
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_current_SHIFT   0
#define BCHP_AON_CTRL_ANA_XTAL_EXT_CML_CONTROL_osc_current_DEFAULT 0x00000001

/***************************************************************************
 *PM_DRAM_READY_STATUS_MASK - DRAM Ready status mask control
 ***************************************************************************/
/* AON_CTRL :: PM_DRAM_READY_STATUS_MASK :: reserved0 [31:02] */
#define BCHP_AON_CTRL_PM_DRAM_READY_STATUS_MASK_reserved0_MASK     0xfffffffc
#define BCHP_AON_CTRL_PM_DRAM_READY_STATUS_MASK_reserved0_SHIFT    2

/* AON_CTRL :: PM_DRAM_READY_STATUS_MASK :: memc [01:00] */
#define BCHP_AON_CTRL_PM_DRAM_READY_STATUS_MASK_memc_MASK          0x00000003
#define BCHP_AON_CTRL_PM_DRAM_READY_STATUS_MASK_memc_SHIFT         0
#define BCHP_AON_CTRL_PM_DRAM_READY_STATUS_MASK_memc_DEFAULT       0x00000000

/***************************************************************************
 *SPARE_CTRL_0 - Spare control bits reserved for future use
 ***************************************************************************/
/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_31 [31:31] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_31_MASK              0x80000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_31_SHIFT             31
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_31_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_30 [30:30] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_30_MASK              0x40000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_30_SHIFT             30
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_30_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_29 [29:29] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_29_MASK              0x20000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_29_SHIFT             29
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_29_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_28 [28:28] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_28_MASK              0x10000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_28_SHIFT             28
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_28_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_27 [27:27] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_27_MASK              0x08000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_27_SHIFT             27
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_27_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_26 [26:26] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_26_MASK              0x04000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_26_SHIFT             26
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_26_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_25 [25:25] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_25_MASK              0x02000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_25_SHIFT             25
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_25_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_24 [24:24] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_24_MASK              0x01000000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_24_SHIFT             24
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_24_DEFAULT           0x00000001

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_23 [23:23] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_23_MASK              0x00800000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_23_SHIFT             23
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_23_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_22 [22:22] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_22_MASK              0x00400000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_22_SHIFT             22
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_22_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_21 [21:21] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_21_MASK              0x00200000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_21_SHIFT             21
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_21_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_20 [20:20] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_20_MASK              0x00100000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_20_SHIFT             20
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_20_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_19 [19:19] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_19_MASK              0x00080000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_19_SHIFT             19
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_19_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_18 [18:18] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_18_MASK              0x00040000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_18_SHIFT             18
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_18_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_17 [17:17] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_17_MASK              0x00020000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_17_SHIFT             17
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_17_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_16 [16:16] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_16_MASK              0x00010000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_16_SHIFT             16
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_16_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_15 [15:15] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_15_MASK              0x00008000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_15_SHIFT             15
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_15_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_14 [14:14] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_14_MASK              0x00004000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_14_SHIFT             14
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_14_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_13 [13:13] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_13_MASK              0x00002000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_13_SHIFT             13
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_13_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_12 [12:12] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_12_MASK              0x00001000
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_12_SHIFT             12
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_12_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_11 [11:11] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_11_MASK              0x00000800
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_11_SHIFT             11
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_11_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_10 [10:10] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_10_MASK              0x00000400
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_10_SHIFT             10
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_10_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_09 [09:09] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_09_MASK              0x00000200
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_09_SHIFT             9
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_09_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_08 [08:08] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_08_MASK              0x00000100
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_08_SHIFT             8
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_08_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_07 [07:07] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_07_MASK              0x00000080
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_07_SHIFT             7
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_07_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_06 [06:06] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_06_MASK              0x00000040
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_06_SHIFT             6
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_06_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_05 [05:05] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_05_MASK              0x00000020
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_05_SHIFT             5
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_05_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_04 [04:04] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_04_MASK              0x00000010
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_04_SHIFT             4
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_04_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_03 [03:03] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_03_MASK              0x00000008
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_03_SHIFT             3
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_03_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_02 [02:02] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_02_MASK              0x00000004
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_02_SHIFT             2
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_02_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_01 [01:01] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_01_MASK              0x00000002
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_01_SHIFT             1
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_01_DEFAULT           0x00000000

/* AON_CTRL :: SPARE_CTRL_0 :: spare_ctrl_00 [00:00] */
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_00_MASK              0x00000001
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_00_SHIFT             0
#define BCHP_AON_CTRL_SPARE_CTRL_0_spare_ctrl_00_DEFAULT           0x00000000

/***************************************************************************
 *SYSTEM_DATA_RAM%i - System Data RAM Address 0..255
 ***************************************************************************/
#define BCHP_AON_CTRL_SYSTEM_DATA_RAMi_ARRAY_BASE                  0x20410200
#define BCHP_AON_CTRL_SYSTEM_DATA_RAMi_ARRAY_START                 0
#define BCHP_AON_CTRL_SYSTEM_DATA_RAMi_ARRAY_END                   255
#define BCHP_AON_CTRL_SYSTEM_DATA_RAMi_ARRAY_ELEMENT_SIZE          32

/***************************************************************************
 *SYSTEM_DATA_RAM%i - System Data RAM Address 0..255
 ***************************************************************************/
/* AON_CTRL :: SYSTEM_DATA_RAMi :: SYSTEM_DATA_RAM [31:00] */
#define BCHP_AON_CTRL_SYSTEM_DATA_RAMi_SYSTEM_DATA_RAM_MASK        0xffffffff
#define BCHP_AON_CTRL_SYSTEM_DATA_RAMi_SYSTEM_DATA_RAM_SHIFT       0


#endif /* #ifndef BCHP_AON_CTRL_H__ */

/* End of File */